SDH

Software Defined Hardware.

Software Define Hardware (SDH) is one of the DARPA Electronics Resurgence Initiative program, which aims to build runtime-reconfigurable hardware and software that enables near ASIC performance without sacrificing programmability for data-intensive algorithms.

University of Washington is one of the SDH performers to build Polymorphic hybrid ASIC/FPGA architectures based on the Celerity fabric.

Publication

2020

  1. A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix–Matrix Multiplication Accelerator
    Dong-Hyeon Park, Subhankar Pal, Siying Feng, and 15 more authors
    IEEE Journal of Solid-State Circuits, 2020
    DOI

2019

  1. A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm
    Subhankar Pal, Dong-hyeon Park, Siying Feng, and 15 more authors
    In 2019 Symposium on VLSI Technology, 2019
    DOI